aschnell

29 days ago: aschnell started AVR UART and Bootloader

29 days ago: aschnell liked AVR UART and Bootloader

29 days ago: aschnell originated AVR UART and Bootloader

11 months ago: aschnell started Create RISC-V Core using VHDL suitable for TinyFPGA BX

11 months ago: aschnell liked Create RISC-V Core using VHDL suitable for TinyFPGA BX

11 months ago: aschnell originated Create RISC-V Core using VHDL suitable for TinyFPGA BX

11 months ago: aschnell liked Humidity sensors with dashboard

over 2 years ago: aschnell added keyword "software-definded-hardware" to Program FPGA using Verilog and VHDL

over 2 years ago: aschnell removed keyword software-definedhardware from Program FPGA using Verilog and VHDL

over 2 years ago: aschnell added keyword "software-definedhardware" to Program FPGA using Verilog and VHDL

almost 3 years ago: aschnell added keyword "fpga" to Program FPGA using Verilog and VHDL

almost 3 years ago: aschnell added keyword "verilog" to Program FPGA using Verilog and VHDL

almost 3 years ago: aschnell added keyword "vhdl" to Program FPGA using Verilog and VHDL

almost 3 years ago: aschnell started Program FPGA using Verilog and VHDL

almost 3 years ago: aschnell liked Program FPGA using Verilog and VHDL

almost 3 years ago: aschnell originated Program FPGA using Verilog and VHDL

over 4 years ago: aschnell started Custom Style for Devicegraph Output of libstorage-ng

over 4 years ago: aschnell liked Custom Style for Devicegraph Output of libstorage-ng

over 4 years ago: aschnell originated Custom Style for Devicegraph Output of libstorage-ng

over 4 years ago: aschnell started Look at New Parallelisation Technologies

over 4 years ago: aschnell liked Look at New Parallelisation Technologies

over 4 years ago: aschnell originated Look at New Parallelisation Technologies

over 5 years ago: aschnell started add features to libstorage-ng

over 5 years ago: aschnell liked add features to libstorage-ng

over 5 years ago: aschnell originated add features to libstorage-ng