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  5 months ago by mkoutny | Reply

  We implemented several blocks of the circuitry:

  • control (roughly fetch/decode),
  • register file,
  • ALU,
  • block RAM,
  • memory control (for unaligned access).

  We also implemented memory mapped IO (using serial over USB block provided by TinyFPGA's library).

  Additionally, we made a simple demo program and tooling to cross-compile it on non-RISC-V machine and prepare it to "load" it to FPGA board's memory.

  Every circuit block is accompanied with (simulator) testsuite and they pass \o/ We didn't manage to run the circuit on FPGA, probably because of memory data preloading or cumbersome IO. That will need more debugging in the future. (Hence we also didn't get down to any of the non-trivial features.)

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We implemented several blocks of the circuitry: * control (roughly fetch/decode), * register file, * ALU, * block RAM, * memory control (for unaligned access). We also implemented memory mapped IO (using serial over USB block provided by TinyFPGA's library). Additionally, we made a simple demo program and tooling to cross-compile it on non-RISC-V machine and prepare it to "load" it to FPGA board's memory. Every circuit block is accompanied with (simulator) testsuite and they pass \o/ We didn't manage to run the circuit on FPGA, probably because of memory data preloading or cumbersome IO. That will need more debugging in the future. (Hence we also didn't get down to any of the non-trivial features.)
 
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Reply to mkoutny
We implemented several blocks of the circuitry:
• control (roughly fetch/decode),
• register file,
• ALU,
• block RAM,
• memory control (for unaligned access).
We also implemented memory mapped IO (using serial over USB block provided by TinyFPGA's library).
Additionally, we made a simple demo program and tooling to cross-compile it on non-RISC-V machine and prepare it to "load" it to FPGA board's memory.
Every circuit block is accompanied with (simulator) testsuite and they pass \o/ We didn't manage to run the circuit on FPGA, probably because of memory data preloading or cumbersome IO. That will need more debugging in the future. (Hence we also didn't get down to any of the non-trivial features.)
---
# A First Level Header
## A Second Level Header

Use one asterisk to *emphasize*

Use two asterisks for **strong emphasis**

* Use asterisks
* for lists

This is an [example link](http://example.com/)

This is an ![example image](http://paste.opensuse.org/view/raw/68957446)

This is a user link @hans

This is a project link hw#some-cool-title
More Complex Markdown Help
Formatting Help
• Edit
• Preview