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  over 3 years ago by mlnoga | Reply

  Great idea. Maybe there's even a way to use a kind of hardware? I understand that several FPGA vendors already offer RISC-V configurations, e.g. this one claims 2GB DRAM and an 800 MHz clock.

  • 

    over 3 years ago by ldevulder | Reply

    For a first version the idea is to use VM on x86_64 as the same way it was done for aarch64. Next yes real HW could be used, maybe by re-using what has been developed for RPi. This new board could be interesting to use instead of FPGA: https://beaglev.seeed.cc/

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  For a first version the idea is to use VM on x86_64 as the same way it was done for aarch64. Next yes real HW could be used, maybe by re-using what has been developed for RPi. This new board could be interesting to use instead of FPGA: https://beaglev.seeed.cc/
   
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  Reply to ldevulder
  For a first version the idea is to use VM on x86_64 as the same way it was done for aarch64. Next yes real HW could be used, maybe by re-using what has been developed for RPi. This new board could be interesting to use instead of FPGA: https://beaglev.seeed.cc/
  ---
  # A First Level Header
  ## A Second Level Header
  
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  This is an image ![an openSUSE geeko icon](https://en.opensuse.org/images/d/d0/Icon-distribution.png)
  
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Edit Comment 4976
# A First Level Header
## A Second Level Header

Use one asterisk to *emphasize*

Use two asterisks for **strong emphasis**

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This is an [link to example.com](http://example.com/)

This is an image ![an openSUSE geeko icon](https://en.opensuse.org/images/d/d0/Icon-distribution.png)

This is a user link @hans

This is a project link hw#some-cool-title
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Great idea. Maybe there's even a way to use a kind of hardware? I understand that several FPGA vendors already offer RISC-V configurations, e.g. [this one](https://fraserinnovations.com/product/risc-v-board-artix-100t-xc7a100t-fii-prx100-d-xilinx-risc-v-fpga-board-riscv-sopc-ai-xilinx-artix-7/) claims 2GB DRAM and an 800 MHz clock.
 
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Reply to mlnoga
Great idea. Maybe there's even a way to use a kind of hardware? I understand that several FPGA vendors already offer RISC-V configurations, e.g. this one claims 2GB DRAM and an 800 MHz clock.
---
# A First Level Header
## A Second Level Header

Use one asterisk to *emphasize*

Use two asterisks for **strong emphasis**

- Use hyphens
- for unordereed
- lists

This is an [link to example.com](http://example.com/)

This is an image ![an openSUSE geeko icon](https://en.opensuse.org/images/d/d0/Icon-distribution.png)

This is a user link @hans

This is a project link hw#some-cool-title
More Complex Markdown Help
Formatting Help
• Edit
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