The Inforce Computing IFC6540 is an SBC with Qualcomm Snapdragon 805 SoC (32-bit ARMv7).
I had previously brought up openSUSE on the IFC6410. A week before Hackweek Interstellar I got the IFC6540 to boot on serial console using the upstream-based Linaro integration branch, up to searching for the rootfs. Since USB and SATA support were still missing, my goal will be to prepare a MicroSD based rootfs to complete the bringup.
Testing my xf86-video-freedreno package on this board would be the next step.
Packaging gcc cross-compilers for the Hexagon aDSP and investigating how to deploy such code would be another related topic.
Looking for hackers with the skills:
This project is part of:
Hack Week 11 Hack Week 12
Comments
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almost 10 years ago by a_faerber | Reply
SD was not functional on IFC6450 yet and still not is. Instead, instructions for flashing a rootfs to eMMC were provided yesterday on the Linaro Wiki.
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almost 10 years ago by a_faerber | Reply
On lnussel's request I tested his ioquake3 package on the IFC6410 using a downstream 3.4.0 kernel, as the upstream based Linaro kernel was hanging on the IFC6410 (as it later turned out, for lack of DRM related config options and issues still to be investigated). It ran sluggish but okay with freedreno, whereas on my Tegra2 based AC100 (with xf86-video-opentegra) it hung the system due to bad NEON probing code.
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almost 10 years ago by a_faerber | Reply
Support for loading firmware into the Hexagon aDSP was said yet to be contributed to the upstream kernel, based on this patchset.
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almost 10 years ago by a_faerber | Reply
Our binutils 2.24 did not support a hexagon or hexagon-elf target (build results: cross-hexagon-binutils). Patches for GCC 4.4 and some 2011 GNU tools were found on Code Aurora but based on earlier downstream work rather than vanilla sources, so they could not be easily applied to our packages.
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almost 10 years ago by a_faerber | Reply
Post-Hackweek I investigated using clang (LLVM) instead of GCC - enabling the Hexagon target worked (package), but it relied on an external hexagon-as, i.e. binutils. Disassembler support for Hexagon landed in LLVM during Hackweek, but assembler support seemed to be still missing.
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about 9 years ago by lauracrispin | Reply
Inforce computing Introducing the new Inforce 6410Plus SBC powered by the Qualcomm® Snapdragon™ 600 processor (APQ8064). Inforce 6410Plus is the next generation enhanced version of the time-tested Inforce 6410 SBC. The plug-and-play Inforce 6410Plus SBC provides product developers instant access to the rich I/O and connectivity of the well proven and quad-core processing power of the Snapdragon 600 SoC. New features such as a short profile of just 16mm, GPS, support for dual-MIPI-DSI displays, and dual-MIPI-CSI cameras provide an ideal choice for embedded Android and Linux based applications. You can get more details about Inforce 6410 Plus: Inforce 6410Plus
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