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  about 10 years ago by a_faerber | Reply

  SD was not functional on IFC6450 yet and still not is. Instead, instructions for flashing a rootfs to eMMC were provided yesterday on the Linaro Wiki.

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SD was not functional on IFC6450 yet and still not is. Instead, instructions for flashing a rootfs to eMMC were provided yesterday on the [Linaro Wiki](https://wiki.linaro.org/Boards/IFC6540).
 
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SD was not functional on IFC6450 yet and still not is. Instead, instructions for flashing a rootfs to eMMC were provided yesterday on the Linaro Wiki.
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  about 10 years ago by a_faerber | Reply

  On lnussel's request I tested his ioquake3 package on the IFC6410 using a downstream 3.4.0 kernel, as the upstream based Linaro kernel was hanging on the IFC6410 (as it later turned out, for lack of DRM related config options and issues still to be investigated). It ran sluggish but okay with freedreno, whereas on my Tegra2 based AC100 (with xf86-video-opentegra) it hung the system due to bad NEON probing code.

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Edit Comment 916
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On lnussel's request I tested his ioquake3 package on the IFC6410 using a downstream 3.4.0 kernel, as the upstream based Linaro kernel was hanging on the IFC6410 (as it later turned out, for lack of DRM related config options and issues still to be investigated). It ran sluggish but okay with freedreno, whereas on my Tegra2 based AC100 (with [xf86-video-opentegra](https://build.opensuse.org/package/show/devel:ARM:Factory:Contrib:Tegra/xf86-video-opentegra)) it hung the system due to bad NEON probing code.
 
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On lnussel's request I tested his ioquake3 package on the IFC6410 using a downstream 3.4.0 kernel, as the upstream based Linaro kernel was hanging on the IFC6410 (as it later turned out, for lack of DRM related config options and issues still to be investigated). It ran sluggish but okay with freedreno, whereas on my Tegra2 based AC100 (with xf86-video-opentegra) it hung the system due to bad NEON probing code.
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• 

  about 10 years ago by a_faerber | Reply

  Support for loading firmware into the Hexagon aDSP was said yet to be contributed to the upstream kernel, based on this patchset.

  • 

    about 10 years ago by a_faerber | Reply

    Our binutils 2.24 did not support a hexagon or hexagon-elf target (build results: cross-hexagon-binutils). Patches for GCC 4.4 and some 2011 GNU tools were found on Code Aurora but based on earlier downstream work rather than vanilla sources, so they could not be easily applied to our packages.

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  Edit Comment 920
  # A First Level Header
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  Our binutils 2.24 did not support a hexagon or hexagon-elf target (build results: [cross-hexagon-binutils](https://build.opensuse.org/package/show/home:a_faerber:hexagon/cross-hexagon-binutils)). Patches for GCC 4.4 and some 2011 GNU tools were found on [Code Aurora](https://www.codeaurora.org/patches/quic/hexagon/dev/) but based on earlier downstream work rather than vanilla sources, so they could not be easily applied to our packages.
   
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  Our binutils 2.24 did not support a hexagon or hexagon-elf target (build results: cross-hexagon-binutils). Patches for GCC 4.4 and some 2011 GNU tools were found on Code Aurora but based on earlier downstream work rather than vanilla sources, so they could not be easily applied to our packages.
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  • 

    about 10 years ago by a_faerber | Reply

    Post-Hackweek I investigated using clang (LLVM) instead of GCC - enabling the Hexagon target worked (package), but it relied on an external hexagon-as, i.e. binutils. Disassembler support for Hexagon landed in LLVM during Hackweek, but assembler support seemed to be still missing.

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  Edit Comment 922
  # A First Level Header
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  Post-Hackweek I investigated using clang (LLVM) instead of GCC - enabling the Hexagon target worked ([package](https://build.opensuse.org/package/show/home:a_faerber:hexagon/llvm)), but it relied on an external hexagon-as, i.e. binutils. [Disassembler support for Hexagon](http://reviews.llvm.org/rL220393) landed in LLVM during Hackweek, but assembler support seemed to be still missing.
   
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  Reply to a_faerber
  Post-Hackweek I investigated using clang (LLVM) instead of GCC - enabling the Hexagon target worked (package), but it relied on an external hexagon-as, i.e. binutils. Disassembler support for Hexagon landed in LLVM during Hackweek, but assembler support seemed to be still missing.
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Edit Comment 918
# A First Level Header
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Support for loading firmware into the Hexagon aDSP was said yet to be contributed to the upstream kernel, based on [this patchset](https://lkml.org/lkml/2014/9/29/747).
 
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Support for loading firmware into the Hexagon aDSP was said yet to be contributed to the upstream kernel, based on this patchset.
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• 

  over 9 years ago by lauracrispin | Reply

  Inforce computing Introducing the new Inforce 6410Plus SBC powered by the Qualcomm® Snapdragon™ 600 processor (APQ8064). Inforce 6410Plus is the next generation enhanced version of the time-tested Inforce 6410 SBC. The plug-and-play Inforce 6410Plus SBC provides product developers instant access to the rich I/O and connectivity of the well proven and quad-core processing power of the Snapdragon 600 SoC. New features such as a short profile of just 16mm, GPS, support for dual-MIPI-DSI displays, and dual-MIPI-CSI cameras provide an ideal choice for embedded Android and Linux based applications. You can get more details about Inforce 6410 Plus: Inforce 6410Plus

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Edit Comment 1398
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Inforce computing Introducing the new Inforce 6410Plus SBC powered by the Qualcomm® Snapdragon™ 600 processor (APQ8064). Inforce 6410Plus is the next generation enhanced version of the time-tested Inforce 6410 SBC. The plug-and-play Inforce 6410Plus SBC provides product developers instant access to the rich I/O and connectivity of the well proven and quad-core processing power of the Snapdragon 600 SoC. New features such as a short profile of just 16mm, GPS, support for dual-MIPI-DSI displays, and dual-MIPI-CSI cameras provide an ideal choice for embedded Android and Linux based applications. You can get more details about Inforce 6410 Plus: <a href="http://www.inforcecomputing.com/products/single-board-computers/6410-plus-single-board-computer-sbc">Inforce 6410Plus</a>
 
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Inforce computing Introducing the new Inforce 6410Plus SBC powered by the Qualcomm® Snapdragon™ 600 processor (APQ8064). Inforce 6410Plus is the next generation enhanced version of the time-tested Inforce 6410 SBC. The plug-and-play Inforce 6410Plus SBC provides product developers instant access to the rich I/O and connectivity of the well proven and quad-core processing power of the Snapdragon 600 SoC. New features such as a short profile of just 16mm, GPS, support for dual-MIPI-DSI displays, and dual-MIPI-CSI cameras provide an ideal choice for embedded Android and Linux based applications. You can get more details about Inforce 6410 Plus: Inforce 6410Plus
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